Highly efficient parallel processing, fast response to real-time events, and 50% performance gains position the I7200 as the core of choice for high performance embedded applications
SANTA CLARA, Calif., May 01, 2018 (GLOBE NEWSWIRE) — MIPS, provider of the widely used MIPS processor architecture and IP cores for licensing, today announced the I7200 multi-threaded multi-core processor, a new high performance licensable IP core in their midrange 32-bit product lineup. Class-leading efficiency is essential to power sensitive applications such as the high bandwidth modem subsystems in Advanced LTE Pro and upcoming 5G smartphone SoCs, as well as networking ICs, and other applications. The I7200 delivers 50% higher performance in less than 20% area increase than the previous generation from MIPS.
“MIPS CPUs are widely used in a range of LTE applications for mobile broadband,” said David Lau, MIPS’ Vice President of Engineering. “The performance gains across the board on the new I7200 deliver a leap forward in support of the transition to 5G systems, while providing a range of configurable features that enable the CPU core to be optimized for a specific application. For communications processing in LTE modems, where small size and power consumption are at a premium, and latency and deterministic responsiveness are critical to system performance, the I7200 can be tuned to optimize the characteristics for real-time embedded processing.”
Part of the MIPS 32-bit I-Class family of processor cores, the I7200 is built on MIPS’ multi-threading technology, which delivers not only these higher levels of performance efficiently, but is a key mechanism supporting very low latency response to high priority events in real-time embedded systems. These characteristics, in combination with the following deterministic features available in the I7200, make it the ideal processor for embedded applications requiring both high performance and fast response to real-time events:
- Simultaneous multi-threading with thread prioritization and zero cycle context switching
- Configurable memory management – options for full TLB-based MMU or simpler, deterministic 32 region memory protection unit (MPU)
- Tightly coupled, fast-access, deterministic ScratchPad RAMs (SPRAMs, up to 1 MB each) for instructions, data for each core, or unified implementations
“MIPS CPUs, with their powerful multi-threading capability, offer a combination of efficiency and high throughput for LTE modems that contributes significantly to system performance,” said Dr. Kevin Jou, Senior Vice President and Chief Technology Officer, MediaTek. “The development of the I7200 was a worldwide effort led by the MIPS Shanghai design team, and the processor promises to provide key advantages for LTE Advanced/5G features including higher computing performance and faster real-time responsiveness where multiple latency-sensitive tasks are handled simultaneously.”
Complementing the focus for use in embedded real-time systems, the I7200 is the first MIPS core to use the nanoMIPS™ ISA, which delivers industry-leading small code size. nanoMIPS is a variable instruction length ISA consisting of 16/32/48-bit instructions and numerous other optimizations that complement goals of delivering performance in smallest code size. Using an equivalent compiler and compile flags the code size is up to 10% smaller than alternative cores competing in similar applications. This reduces the overall memory footprint for a system, but is essential for high performance communications and real-time embedded systems, as it maximizes the amount of code that can be fit into the fastest, local RAM arrays for low latency, deterministic execution of high priority events and interrupts.
The production released version of the IP core is available immediately for licensing, and the I7200 is gaining widespread support among MIPS partners and customers.
What partners are saying (alphabetically):
“As a long-time partner of MIPS, we believe that the I7200 is a significant milestone that will help propel the company to the forefront of core solutions in the embedded systems marketplace,” said Roisen O’Keeffe, Business Development Director at Ashling Microsystems Ltd. “Through our collaboration on customer programs we’ve come to appreciate the company’s market insight and technology leadership. We look forward to supporting development around the I7200.”
“The I7200 promises to be a highly efficient processor for communications, networking, and other applications that require both high performance and fast response to real-time events,” said William Lamie, CEO at Express Logic. “We look forward to expanding our long-time support for MIPS CPUs with our Industrial Grade X-Ware IoT Platform (Powered by the ThreadX RTOS) to include the new I7200 core.”
“Imperas and OVP simulators, virtual platforms, and debug and analysis solutions help accelerate software development for multi-core and multi-threaded I7200 configurations, and make it easy to model new Instruction Set Architectures (ISAs),” said Simon Davidmann, CEO of Imperas Software, Ltd. “MIPS’ partners can benefit from our programmers’ view reference model, with new I7200 features and nanoMIPS ISA.”
“We are excited to support the I7200 core from MIPS with TRACE32 and to give developers creating products around this new core a full range of debug functionality, whether using MIPS alone or in combination with other solutions,” said Norbert Weiss, International Sales Manager at Lauterbach Development Tools. “This announcement clearly demonstrates MIPS continued leadership in the embedded systems marketplace.”
“As a long-time partner of MIPS, our Nucleus RTOS helps our mutual customers get products to market in a shorter time frame with less risk. Our SMP version already supports the existing multi-threaded and multi-core products in MIPS lineup,” said Scot Morrison, general manager of embedded platform technology, Mentor, a Siemens business. “The new MIPS I7200 processor core delivers exceptional performance and optimized features, enabling MIPS customers to develop a broad range of embedded solutions, including complex LTE/5G communications applications.”
Rupert Baines, CEO of UltraSoC, commented, “UltraSoC is delighted to be partnering with MIPS and supporting the I7200, its new mid-ranged CPU core.” Baines continued, “Adding UltraSoC’s embedded analytics to the powerful, scalable and flexible MIPS core will enable designers to not only develop complex and powerful embedded systems but to provide them with the tools and insight to monitor the operation of the entire system.”
MIPS is a leading provider of processor architectures and IP cores that drive some of the world’s most popular products. With the streamlined MIPS RISC architecture and CPU cores, customers can build highly efficient, scalable, and trusted products across a wide range of performance points – from the IoT edge to high-end networking equipment, and everything in between. MIPS leads the industry with Multi-Threading capabilities for optimal application performance and efficiency. Originally founded in 1984 as MIPS Computer Systems Inc. by researchers from Stanford University, MIPS today is an independent company focused on processing innovations for a new generation of intelligent, connected devices. MIPS designs have shipped in billions of units across the globe and have even reached the outer edges of our solar system. The company is headquartered in Santa Clara, Calif., with offices worldwide. www.mips.com
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